Redefining Infrastructure Philosophy – the Xsight Labs Vision
This introductory session establishes the company’s core identity and its unique approach to the semiconductor market. It explores a product philosophy built on the pillars of extreme scalability, open architecture, and vertical integration to reduce Total Cost of Ownership (TCO). By the end of this section, the audience will understand how the company’s commitment to agility and simplicity drives its engineering decisions. Xsight Labs, a fabless semiconductor company founded in 2017, designs and sells chips manufactured through TSMC. Led by serial entrepreneurs and backed by $440 million in top-tier VC funding, the company employs over 200 engineers globally. Their unique approach aims to democratize the semiconductor space by providing open, programmable, and vertically integrated solutions for the rapidly evolving AI and data center infrastructure markets.
Xsight Labs focuses on two critical components of the “AI factory” or “token machine”: an Ethernet switch chip (X-series) and a Data Processing Unit (DPU) or infrastructure processor (E-series). These products are developed on 5nm technology, are generally available, and the X-series is already in mass production. The company emphasizes a “software-defined infrastructure” philosophy, claiming to be the first chip company to offer wire-speed, energy-efficient, and truly programmable products without compromising performance, price, or power. This agility is crucial given the unpredictable nature of future AI applications, and their open instruction sets and collateral allow for community contributions and custom compilers, accelerating innovation.
The E-series DPU, specifically the E1 800 gig product, is designed from an ARM server perspective rather than a traditional network interface card, offering 64-core ARM chips with derivatives to optimize for various power and performance needs. The upcoming E1L will be a low-power version targeting control plane markets and programmable SmartNICs. The X-series Ethernet switch, with its X2 12.8 terabit monolithic die, stands out for its exceptionally low power consumption (180W compared to competitors’ 300-600W) while maintaining high performance, low latency, and full programmability from Layer 1 to Layer 4 with embedded memory switches. The future X3 will further expand bandwidth and radix points through clever die combining, reinforcing Xsight Labs’ commitment to innovative, power-efficient, and highly flexible infrastructure solutions.
Presented by Ted Weatherford, Vice President of Business Development, Xsight Labs. Recorded live at AI Infrastructure Field Day in Santa Clara on January 29th, 2026. Watch the entire presentation at https://techfieldday.com/appearance/xsight-labs-presents-at-ai-infrastructure-field-day/ or visit https://techfieldday.com/event/aiifd4/ or https://xsightlabs.com/ for more information.
Transcript
So, uh, my name's Ted Weatherford and I'm VP of Business Development at Xite Labs. And I've got my colleague, distinguished engineer here, Mr. John Kearney.
Nice to be here. And, uh, we'll take you through the company and its products and its real world applications. Awesome.
Thanks John. So, right off the bat, I just want you to know, we're a fab semiconductor company. We, we sell chips we designed and we're fabulous because we push 'em through TSMC.
And we have two really relevant products for AI here. Uh, two out of the big six that makes up an AI factory or a token token machine. Um, one's an ethernet switch chip and the other one is, uh, DPU or data processing unit.
Sometimes they're called infrastructure processors. We'll tell you all about what that is. Um, great.
So we're gonna run real quick through the corporate vision stuff, let you know who we are, move right onto the products as soon as we can. We're founded in 2017. Um, so we've been around a while.
We call ourselves an early stage company, not a startup 'cause it's been nine years. We're 200, we're 200 people, uh, with another, uh, 45, um, you know, contractors and 15 or so, uh, part-time folks. And we're located, uh, engineering wise, most of 200 of us are engineers.
Even US salesy types are engineers usually. So, uh, we're located in Israel in three locations there, Tel Aviv and Kirin Got, and then up north and Haifa. We also have a beautiful team of 30 or so people on the East Coast in both Boston and Research Triangle Park, uh, Raleigh Durham area.
And then the business development and sales and marketing, uh, and application engineering, uh, is in San Jose, California, uh, where we are here today. And then we also have people overseas, uh, in Europe. Uh, Poland, uh, um, uh, U Ukraine is where they came from originally.
Uh, and then we have people, uh, in, um, Scandinavia as well, and a couple folks in China. All right. We are a tier one VC funded company.
Um, our chairman of the board is a serial entrepreneur. I think he's run 12 across the, the finish line in terms of change of controls starting very famous companies like Marvell Semiconductors, Galileo, which came the famous sterile line and ethernet, uh, Silicon one labia. Um, the AL Labs that became the Nitro and the Graviton and Theran inside of Amazon.
Um, wrote the first check to all Waldman for, uh, Mellanox. That became a big part of NVIDIA's, uh, real success. So this is a, a real top tier group.
Uh, a tradies, uh, fidelity battery. Uh, Microsoft's M1 two, uh, investment group, a MD. It's a long list.
Um, I wanna move right to the fact that we're at $440 million. It's really expensive to do these kind of chips. Um, so having this kind of pedigree, uh, and having the money to go the distance is a big part of it.
Um, these are what we believe are the six highest average selling price. Most complex products that are the pinnacles or the mainstay of an AI factory. It's of course the XPU or the GPU, the CPU, the DPU, which we'll introduce to you today and what it does.
And also the performance nick or the, uh, Nick that you find a lot on the backend, uh, uh, for performance. And then of course, there's two switches. Now.
There's the ethernet we've all heard about forever. Uh, and then there's this new scale up, which would be example of like Nvidia NV Link or this new ultra ethernet that Broadcom's introduced. And we do two of those.
So it's exciting to have a 200 person engineering team, 40 to 60 overhead for everything else globally going after these two products. Um, they're five nanometer products and they're all available now. Uh, so we're in general availability on both products.
And we're in mass production on the first product, which is the X, which I'll cover. Um, we are a software defined infrastructure, software defined networking, software defined storage, you know, software defined. Everything is a buzzword, but we believe we really are for the first time, the only chip company that came out with wire speed, energy efficient, actually programmable products that are running at the highest rates demanded by the cutting edge ai.
Okay? And not just ai, but any data center infrastructure. This is what I wanna show you today and, and give you a comfort for.
And it's really never happened before. There's always a performance hit or a price hit or a power hit. The reality is we have a lot of transistors in our IO ring now we're chip people.
And you can do a lot now with those transistors that you're getting for whatever that bandwidth io ring. So when you're up at the high end and you're doing a lot of bandwidth in and out of your iOS, you do have a sea of transistors, and we've said for AI in particular, but infrastructure in general, you can't know what the applications are gonna be. You need a degree of agility that's profound.
You also have to have the velocity of the software programmer, the software engineer, and especially with AI coding now. So we're really excited to have this ethos or this approach. So we're open, that means that our instruction sets are open.
Uh, our collateral's open. We're trying to fight the good fight. We're trying to democratize everything in an era of verticalization.
So we stand by that. We've already got people writing their own compilers on top of our ethernet switch chip. So it's, it's very exciting to be open because you get the crowdsource, you get that momentum.
Uh, we're programmable as outlined a minute ago. We'll get into how deep we are programmable, but it's really a software engineer's perspective and dream with these products. Not what we call chip heads or hardware folks like myself.
It's really designed, uh, for Linux and open instruction sets to be able to code at a high level and still get to 800 gig, still get to high rated ethernet switching. Um, E-Series is the DP, that's the one that's just flying off the shelves because nobody else has 800 gig yet. Uh, and so we took a, a approach philosophically of coming from a server, coming from an armed server, not coming from a nic, a network interface card or, or connectivity device.
So we, we looked at it not from the hardwired pipeline, fixed, rigid, efficient building block like the nic. We looked at it from the compute side and worked the other direction. And this'll come out in, in our whole ethos in, in our architecture, which John will cover here soon.
The X switch is the first product that's performing like a tomahawk or a Marvell telynx or an NVIDIA spectrum with less power, same latency, and full programmability from layer one to layer four, all state full processing for forwarding with embedded memory switches never been done before. Okay, so these are the actual products, um, and roadmap. So the E one is our 800 gig product out.
Now. We do different artificial derivatives. It's a monolithic dye, so you can get the, you know, the 24 core Okay.
Get different sizes. Uh, and then the E one L is a new tape out, but it's also in five nanometer. And it's the same interconnect to the arm cores.
It's the same arm cores, it's the same caching subsystem. We have a P unit for the PIE side. Uh, we have a e unit for the ethernet side.
Same, it's just, we did a really small super low power version. This allows us to go after control plane markets sitting next to other routers and switches or any control plane for any piece of gear in any market. But it also allows us to go after a full programmable soft S-D-N-S-D-X approach to the smart nick.
So all of a sudden you can do a hundred gig, 50 gig, 200 gig nick at a ridiculously low power and, and, and price. 8 terabit monolithic dye in five nanometers. So we have amazing high yields, which is price and cost and very low power.
8 T switch. And you know, the nearest competitor is, is over over 300 and some of them are 600. So it's, it's devastating little power with the flexibility.
X three is just going to be a larger derivative of that. We're gonna do a single tape out with a single dye, uh, that d might combine in different ways and we will attack three different bandwidth and rate x points with one tape out through that clever combining, but I can't tell you what the actual bandwidth is. But that's the next year product and the E one L tapes out in a couple months.
So we'll have that. This E one is in, in general availability, X two's in mass production. Quick, Quick question.
Are you already, have you already generated the 64 core arm chip? Like Yeah, it's already done. Yeah, it's done.
We started with the, the top performing one and then did the down derivative. Okay. Um, and then there's a e you get your sizing, right?
Yeah, yeah, yeah. You come out with a high performance one and you take the price hit during the negotiation And they turn off the other cores. Yeah.
You, you can turn off cores, you bin 'em. Right. There's a lot of clever ideas that we do to get the price where you and the power where you need it.
Yeah. Um, you have a lot of, um, uh, flexibility with all that stuff. You run the s different speeds.
Mm-hmm. You can only have half the dram interfaces, half the cores turn the core clocks down. You've got a lot of, of different latitude for tailoring your power to your, your opportunity.
Yeah.